Faizan Ahmad Khattak
- Position: Research Fellow
- Email: F.A.Khattak@leeds.ac.uk
- Website: Personal Google Site | LinkedIn | Googlescholar | ORCID
Profile
Faizan is a postdoctoral researcher in the Computer Science department, where he is developing numerical testing software to determine the numerical features of matrix multipliers on GPUs. He completed his PhD in April 2024 at the University of Strathclyde, focusing on advanced polynomial matrix decomposition algorithms—such as EVD, SVD, and QR—for broadband sensor arrays. Faizan has collaborated extensively with Signla Processing group at Strathclyde research group since 2021, contributing to multiple works related to broadband sensor array application. His broader expertise spans signal processing, high-performance computing, and simulation-based algorithm evaluation.
Research interests
Signal Processing,
Communication,
Algorithm Development,
Algorithm Optimization,
Embedded Systems (FPGAs and DSPs)